An important goal when designing a processor is to maximize the processor's performance, or speed, for logic operations. One way this is done is by using a clock signal, such as the one shown in FIG. 1 (CLOCK), to synchronize logic operations. Typically, a CLOCK signal is "low" for a fixed period of time and "high" for the same fixed period of time.
A processor's performance can be further enhanced if a "pulse" signal, such as a pulse clock signal, is used. An example of a pulse clock signal is also shown in FIG. 1 (PULSE 1). As can be seen, the PULSE 1 signal is "high" for only a brief period of time and can be generated, for example, when the CLOCK signal transitions from a low level to a high level. This transition from low to high is also known as a "rising edge" of a signal. Both the rising and falling edges of each pulse in the PULSE 1 signal are generated by a single rising edge of the CLOCK signal, and each pulse is basically a "one-shot" of a CLOCK signal edge. The amount of time that each pulse remains high can be thought of as the "width" of the pulse (W). A pulse can similarly be generated by the falling edge of the CLOCK signal. In some cases, it is desirable to generate pulses in response to both the rising and falling edges in the CLOCK signal (PULSE 2). In either case, logic that uses a pulse signal can offer both speed and gain advantages over circuits that use a normal CLOCK signal.
Circuits that use pulse signals, however, can be complex to design. Moreover, different functions or circuits in a processor may require pulses of different widths. In this case, it is necessary to design multiple pulse generator circuits, each creating pulses of different widths. This can be an expensive and time consuming task. If a single pulse generator circuit could produce pulses having different widths, the same circuit could be used throughout the processor for different functions, thus simplifying the design.
Another problem with pulse signal circuits is that they are difficult to test and debug. Even a slight variation in pulse width can cause problems. If a pulse generator circuit could provide variable width pulses, and if those widths could be selected by, for example, one or more control signals, then the pulse width could be adjusted during the debugging process to reveal the cause of the problem.
In view of the foregoing, it can be appreciated that a need exists for a pulse generator that solves the problems discussed above.